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ATmega128
enables the master to switch between slaves, Master Transmitter mode and Master Receiver
mode without losing control over the bus.
Figure 99. Formats and States in the Master Receiver Mode
MR
Successfull
reception
S
SLA
R
A
DATA
A
DATA
A
P
from a slave
receiver
$08
$40
$50
$58
Next transfer
started with a
R S
SLA
R
repeated start
condition
$10
Not acknowledge
received after the
A
P
W
slave address
$48
MT
Arbitration lost in slave
address or data byte
A or A
Other master
continues
A
Other master
continues
$38
$38
Arbitration lost and
addressed as slave
A
Other master
continues
$68
$78
$B0
To corresponding
states in slave mode
From master to slave
From slave to master
DATA
n
A
Any number of data bytes
and their associated acknowledge bits
This number (contained in TWSR) corresponds
to a defined state of the Two-wire Serial Bus. The
prescaler bits are zero or masked to zero
217
2467X–AVR–06/11
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